The present invention relates to a method for interconnecting the active zones and/or the gates of a C/MOS integrated circuit. This method more particularly makes it possible to form short distance connections between the sources and drains of MOS transistors (metal--oxide--semiconductor) with a n or p channel entering in the construction of the C/MOS integrated circuit (complementary MOS), whilst also connecting the sources and/or drains to the gates of said same transistors.
C/MOS integrated circuits, the simplest of which is an inverter formed solely by a n channel transistor and a p channel transistor, one being non-conductive and the other conductive and vice versa, have the advantage of consuming very little electric power. However, they have a low integration density. The latter is more particularly linked with the need for frequently connecting n+ type regions (source or drain of n channel transistors) and p+ regions (source and drain of p channel transistors), this necessity being explained by the fact that each elementary gate of the integrated circuit comprises both n channel transistors and p channel transistors.
As shown in FIG. 1, which in longitudinally sectional form illustrates a C/MOS inverter, these connections are presently obtained after forming the constituent elements of the circuits, i.e. the active zones such as sources 2 and 8 and the drains 4 and 6 of the circuit transistors, the gates 12 and 14 thereof and the field oxide 16, by firstly depositing on the complete integrated circuit an insulating coating 18, which is generally of silicon oxide, followed by the etching of said insulating coating in order to form electric contact holes, such as 20 and 22 of both the active zones and the gates. Finally, onto the etched insulating coating 18 is placed a conductive coating 24, which is generally of aluminium, which is etched in order to form the desired connections, such as connection 24a between the n channel transistor drain 4 and drain 6 of the p channel transistor of the inverter.
In such a method, apart from the surface occupied by the actual connections, it is essentially the electric contact holes 20, 22 formed in the insulating coating and the guards such as 26, 27 necessary for the positioning of said holes, which reduce the integration density of C/MOS integrated circuits.
In order to increase the integration density of such C/MOS circuits, particularly by reducing the surface occupied by the connections, sometimes circuits are produced with two interconnection levels and which are generally of aluminum. However, this complicates the method for producing such circuits to a significant extent and does not make it possible to eliminate the problem of the electric contact holes in the insulating coating.